symbol v ds v gs i dg i gs i dm i ar e ar t j , t stg symbol typ max r q ja 60 75 r q jc 0.7 1.3 a + 50 continuous drain gate current continuouse gate source current ma i d 80 57 + 50 maximum junction-to-case b steady-state c/w thermal characteristics parameter units maximum junction-to-ambient a steady-state c/w clamped gate-source voltage drain-source voltage clamped continuous drain current g maximum units parameter t c =25c t c =100c absolute maximum ratings t a =25c unless otherwise noted vv repetitive avalanche energy h 125 pulsed drain current c junction and storage temperature range p d t c =100c avalanche current l=100uh h power dissipation b t c =25c 115 58 -55 to 175 250 50 a mj a c w AOT500L n-channel enhancement mode field effect transistor features v ds (v) = clamped i d = 80a (v gs = 10v) r ds(on) < 5.3 m w (v gs = 10v) 100% uis tested 100% rg tested general description aot500 uses an optimally designed temperature compensated gate-drain zener clamp. under overvoltage conditions, the clamp activates and turns on the mosfet, safely dissipating the energy in the mosfet. the built in resistor guarantees proper clamp operation under all circuit conditions, and the mosfet never goes into avalanche breakdown. advanced trench technology provides excellent low rdson, gate charge and body diode characteristics, making this device ideal for motor and inductive load control applications. standard product aot500 is pb-free (meets rohs & sony 259 specifications) g 10 w s d to220 top view bottom view g g s d d s d d alpha & omega semiconductor, ltd. www.aosmd.com
aot500 symbol min typ max units bv dss(z) 33 v bv clamp 36 44 v i dss(z) 30 m a bv gss 20 v i gss 10 ma v gs(th) 1.5 2 3 v i d(on) 250 a 4.1 5.3 t j =125c 6.2 g fs 95 s v sd 0.7 1 v i s 80 a c iss 4200 5500 pf c oss 765 pf c rss 340 pf r g 13 30 w q g (10v) 69 89 nc q g (4.5v) 34 nc q gs 12 nc q gd 15 nc t d(on) 25 ns t r 35 ns t d(off) 150 ns t f 62 ns t rr 60 78 ns q rr 84 nc 11 this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. drain-source clamping voltage i d =1a, v gs =0v body diode reverse recovery time drain-source breakdown voltage on state drain current i d =10ma, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =30a reverse transfer capacitance i f =30a, di/dt=100a/ m s v gs =0v, v ds =15v, f=1mhz switching parameters electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions gate threshold voltage v ds =v gs , i d =250 m a v ds =16v, v gs =0v v ds =0v, v gs =10v zero gate voltage drain current gate-body leakage current gate-source voltage v ds =0v, i d =250 m a r ds(on) static drain-source on-resistance forward transconductance diode forward voltage m w i s =1a, v gs =0v v ds =5v, i d =30a gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =10v, v ds =15v, i d =30a gate source charge gate drain charge total gate charge body diode reverse recovery charge i f =30a, di/dt=100a/ m s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =0.5 w , r gen =3 w a: the value of r q ja is measured with the device in a still air environ ment with t a =25c. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c: repetitive rating, pulse width limited by juncti on temperature t j(max) =175c. d. the r q ja is the sum of the thermal impedence from junction to case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =175c. g. the maximum current rating is limited by bond-wi res. h. e ar and i ar are based on a 100uh inductor with tj(start) = 25c for each pulse. rev 2: dec 2010 alpha & omega semiconductor, ltd. www.aosmd.com
aot500 typical electrical and thermal characteristics v gs =10v, i d =30a 20 26 48 63 30 40 10 13 0 20 40 60 80 100 1 1.5 2 2.5 3 3.5 4 v gs (volts) figure 2: transfer characteristics i d (a) 25c 3 3.5 4 4.5 5 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage r ds(on) (m w ww w ) 0.0001 0.001 0.01 0.1 1 10 100 -1. 6 -1. 4 -1. 2 -1. 0 -0. 8 -0. 6 -0. 4 -0. 2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics i s (a) 25c 125c -40c 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -50 -25 0 25 50 75 100 125 150 175 200 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance v gs =10v i d =30a 2 4 6 8 10 12 14 2 5 8 11 14 17 20 v gs (volts) figure 5: on-resistance vs. gate-source voltage r ds(on) (m w ww w ) -40c 125c v ds =5v v gs =10v i d =30a 25c 125c 0 50 100 150 200 250 0 1 2 3 4 5 v ds (volts) fig 1: on-region characteristics i d (a) v gs =3.5v 10v 7v 6v 4v 4.5v 5v alpha & omega semiconductor, ltd.
aot500 typical electrical and thermal characteristics v gs =10v, i d =30a 20 26 48 63 30 40 10 13 0 2 4 6 8 10 0 10 20 30 40 50 60 70 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 1000 2000 3000 4000 5000 6000 7000 0 5 10 15 20 25 30 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 100 1000 10000 0.00001 0.0001 0.001 0.01 0.1 1 pulse width (s) figure 10: single pulse power rating junction- to-case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) z q qq q jc normalized transient thermal resistance c oss c rss v ds =30v i d =30a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc r q jc =1.3c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175c t a =25c 1 10 100 1000 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note e) 10 m s 100 m s 10ms 1ms dc r ds(on) limited t j(max) =175c t c =25c alpha & omega semiconductor, ltd.
aot500 typical electrical and thermal characteristics v gs =10v, i d =30a 10 100 1000 10 100 1000 time in avalanche, t a (us) figure 12: single pulse avalanche capability i d (a), peak avalanche current 0 20 40 60 80 100 120 0 25 50 75 100 125 150 175 t case (c) figure 13: power de-rating (note b) power dissipation (w) 0 20 40 60 80 100 0 25 50 75 100 125 150 175 t case (c) figure 14: current de-rating (note b) current rating i d (a) dd d a v bv i l t - = t c =25c alpha & omega semiconductor, ltd.
aot500 typical protection characteristics 0.00 0.50 1.00 1.50 2.00 30 35 40 45 v ds (volts) fig 15: bv clamp characteristic i d (a) bv dss(z) bv clamp 0.00 10.00 20.00 30.00 40.00 50.00 60.00 0.00e+00 2.50e-06 5.00e-06 7.50e-06 1.00e-05 time in avalanche (seconds) fig 16: unclamped inductive switching id (a)/ vds(v) bv clamp 100 o c trench bv bv clamp 25 o c fig16: the built-in gate to drain clamp prevents th e device from going into avalanche by setting the clamp voltage w ell below the actual breakdown of the device. when the drain to g ate voltage approaches the bv clamp, the internal gate to sourc e voltage is charged up and channel conduction occurs, sinking t he current safely through the device. the bv clamp is virtually temperature independent, providing even greater protection duri ng normal operation. this device uses built-in gate to source and gate t o drain zener protection. while the gate-source zener protects ag ainst excessive v gs conditions, the gate to drain protection, clamps t he vds well below the device breakdown, preventing an avalanche condition within the mosfet as a result of voltage over-shoo t at the drain electrode. it is designed to breakdown well before the device breakdown. during such an event, current flows through the zen er clamp, which is situated internally between the gate to drain. t his current flows at bv dss(z) , building up the v gs internal to the device. when the current level through the zener reaches approxima tely 300ma, the v gs is approximately equal to v gs(plateau) , allowing significant channel conduction and thus clamping the drain to s ource voltage. the v gs needed to turn the device on is controlled with an internally lumped gate resistor r approximately equal to 10 . v gs(plateau) = 10 x 300ma =3v it can also be said that the vds during clamping is equal to: bv dss = bv clamp + v gs(plateau) additional power loss associated with the protectio n circuitry can be considered negligible when compare to the conductio n losses of the mosfet itself; ex: pl=30amax x 16v=0.48mw (zene r leakage loss) pl(rds)=102a x 6m =300mw (mosfet loss) r s d + + - vz g v plateau + - - alpha & omega semiconductor, ltd.
aot500 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr alpha & omega semiconductor, ltd.
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